- Document Number:
20240387650
- Appl. No:
18/789115
- Application Filed:
July 30, 2024
- Abstract:
Methods for fabricating a bipolar junction transistor (BJT) are provided. A method includes forming a collector region, forming base regions over the collector region, and forming emitter regions over the base regions. The method further includes forming base dielectric layers over the collector region and on opposite sides of the base regions, forming base conductive layers over the base dielectric layers and on the opposite sides of the base regions, and forming base contacts over the base conductive layers. The top surface of the collector region is coplanar with bottom surfaces of the base regions and bottom surfaces of the base dielectric layers. The base contacts are divided into a first group of base contacts disposed between the base regions and a second group of base contacts disposed between the base regions and the STI region.
- Assignees:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Hsinchu, TW)
- Claim:
1. A method for fabricating a bipolar junction transistor (BJT), comprising: forming a collector region within a semiconductor substrate; forming a ring-shaped shallow trench isolation (STI) region within the semiconductor substrate; forming a plurality of base regions over the collector region; forming a plurality of emitter regions over the base regions; forming a plurality of base dielectric layers over the collector region and on opposite sides of the base regions; forming a plurality of base conductive layers over and in contact with the base dielectric layers and on the opposite sides of the base regions, wherein the base conductive layers are in contact with sidewalls and top surfaces of the base regions; and forming a plurality of base contacts over the base conductive layers, wherein a top surface of the collector region is coplanar with bottom surfaces of the base regions and bottom surfaces of the base dielectric layers, wherein the base contacts are divided into a first group of base contacts disposed between the base regions and a second group of base contacts disposed between the base regions and the STI region.
- Claim:
2. The method as claimed in claim 1, wherein the base dielectric layers are in contact with the collector region.
- Claim:
3. The method as claimed in claim 1, further comprising: forming a collector contact over the collector region, wherein the ring-shaped STI region is surrounded by the collector contact.
- Claim:
4. The method as claimed in claim 1, wherein a first area of the semiconductor substrate surrounded by the ring-shaped STI region is 3 to 8 times larger than a second area of the emitter regions projected onto the first area.
- Claim:
5. The method as claimed in claim 1, wherein the base dielectric layers partially overlaps overlap the ring-shaped STI region.
- Claim:
6. The method as claimed in claim 1, wherein the ring-shaped STI region is laterally separated from the base regions by the base dielectric layers.
- Claim:
7. A method for fabricating a bipolar junction transistor (BJT), comprising: forming a collector region within a semiconductor substrate; forming a shallow trench isolation (STI) region within the collector region; forming a plurality of base regions over a first area of the collector region, wherein the first area of the collector region is surrounded by an inner side wall of the STI region; forming a plurality of emitter regions over the base regions; forming a base dielectric layer over the collector region and on opposite sides of the base regions; forming a base conductive layer over the base dielectric layer, wherein the base conductive layer is on the opposite sides of the base regions; and forming a plurality of base contacts over the base conductive layer, wherein the first area of the collector region is 3 to 8 times larger than a second area of the emitter regions projected onto the first area of the collector region, wherein the base contacts are divided into a first group of base contacts disposed between the base regions and a second group of base contacts disposed between the base regions and the STI region, wherein the first group of base contacts is formed over the first area of the collector region.
- Claim:
8. The method as claimed in claim 7, further comprising: forming a plurality of emitter contacts over the emitter regions, wherein the base dielectric layer is between the base contacts and the collector region, wherein the base dielectric layer corresponding to the first group of base contacts is in contact with the collector region.
- Claim:
9. The method as claimed in claim 7, wherein the emitter regions extend in the first direction, and the number of base contacts in the first group of base contacts between two adjacent base regions is greater than 2.
- Claim:
10. The method as claimed in claim 7, wherein the second group of base contacts partially overlaps the STI region, and the first group of base contacts is separated from the STI region.
- Claim:
11. The method as claimed in claim 7, further comprising: forming a collector contact over the collector region, wherein the STI region is surrounded by the collector contact.
- Claim:
12. The method as claimed in claim 7, wherein a portion of the semiconductor substrate located between the base regions is free of the STI region.
- Claim:
13. A method for fabricating a bipolar junction transistor (BJT), comprising: forming a collector region within a semiconductor substrate; forming a shallow trench isolation (STI) region within the collector region; forming a plurality of base regions over the collector region; forming a plurality of base dielectric layers over the collector region and on opposite sides of the base regions; forming a plurality of base conductive layers over and in contact with the base dielectric layers and on the opposite sides of the base regions, wherein the base conductive layers are in contact with sidewalls and top surfaces of the base regions; forming a plurality of emitter regions over the base regions; forming a plurality of spacer layers along vertical sidewalls of the emitter regions, wherein the spacer layers electrically isolate the emitter regions from the base conductive layers; and forming a plurality of base contacts over the base conductive layers, wherein the base regions are surrounded by an inner side of the STI region, wherein the base contacts are divided into a first group of base contacts disposed between the base regions and a second group of base contacts disposed between the base regions and the STI region.
- Claim:
14. The method as claimed in claim 13, further comprising: a collector contact formed over the collector region, wherein the STI region is surrounded by the collector contact.
- Claim:
15. The method as claimed in claim 13, wherein the second group of base contacts partially overlaps the STI region, and the first group of base contacts is separated from the STI region.
- Claim:
16. The method as claimed in claim 13, wherein a first area of the semiconductor substrate surrounded by the STI region is 3 to 8 times larger than a second area of the emitter regions projected onto the first area.
- Claim:
17. The method as claimed in claim 13, wherein a portion of the semiconductor substrate located between the base regions is free of the STI region.
- Claim:
18. The method as claimed in claim 13, further comprising: forming a plurality of emitter contacts over the emitter regions.
- Claim:
19. The method as claimed in claim 13, wherein the base dielectric layers are between the base contacts and the collector region, and wherein the base dielectric layers corresponding to the first group of base contacts are in contact with the collector region.
- Claim:
20. The method as claimed in claim 13, further comprising: forming a plurality of dielectric layers over the base conductive layers and in contact with the spacer layers, wherein upper surfaces of the dielectric layers are aligned with upper surfaces of the spacer layers.
- Current International Class:
01; 01; 01
- Accession Number:
edspap.20240387650
Processing Request
No Comments.